Patent literature 1 discloses a non-volatile semiconductor storage device including a protection function from a data write or erase. FIG. 9 is a block diagram showing the non-volatile semiconductor storage device disclosed in patent literature 1. As shown in FIG. 9, this non-volatile semiconductor storage device includes a memory cell array 1 composed of a plurality of memory blocks, interfaces 6 and 7, write circuits 2, 3, 4, 5, and 8 and read circuits 2, 3, 4, 5, and 8. A protect flag is written in the above-mentioned memory block. The above circuit is characterized in that in response to a write command input from the above interface, the write circuit executes the write command when the protect flag has a first value and does not execute the write command when the protect flag has a second value.
Patent literature 2 discloses a processor that attempts to prevent unauthorized actions such as unauthorized access to a computer at low cost. The processor disclosed in patent literature 2 includes: processor side memory authentication information holding means configured integrally with a computing means for holding first memory authentication information and second memory authentication information; memory authentication means for comparing first memory authentication information obtained from a first memory and the first memory authentication information held by the processor side memory authentication information holding means to authenticate the first memory and comparing second memory authentication information obtained from a second memory and the second memory authentication information held by the processor side memory authentication information holding means to authenticate the second memory; and access control means for controlling access to the first memory and the second memory based on authentication results by the memory authentication means.